About CapExt

CapExt is a capacitance simulator designed specifically for electronic circuit boards, with the philosophy that it should be easy to use, while still providing accurate results. Simulate the self-capacitance of a single electrode, and its capacitive coupling to other electrodes, using a physically accurate 3D Monte Carlo method.

Using CapExt is easy, the only input needed, in addition to the Gerber-files themselves, is the thickness and material (e.g. glass, FR4 etc.) of each layer. The electrodes are automatically extracted from the provided RS-274X Gerber-files, taking into account vias connecting the layers. Select which electrodes you are interested in simulating the capacitance for, and run the simulation.

View the self-capacitance for each selected electrode, or dig down to examine the mutual capacitances. All electrodes contribute to the mutual capacitance, not just the electrodes selected for simulation. An estimate of the error is also provided, and if more accurate results are needed, simply let the simulation run for a longer period of time.

Key Features

Industry standard formats

CapExt supports the industry standard RS-274X Gerber format. It can also import common picture formats like .bmp and .png.


CapExt is optimized for PCBs and similar planar designs. Results are available within minutes on a typical work-station. If higher accuracy is needed, simply let the simulation run for more iterations.


It is easy to modify the stackup, to include for example a glass or plastic overlay over the PCB, or increase or decrease the layer thickness.


Use the integrated 3D view to quickly identify the physical electrodes. Click any electrode in the 3D view to find the corresponding electrical net in either the simulation options pane or the simulation results pane. Hover over any simulation result to highlight the corresponding electrode in the 3D view.


Include the whole system in the simulation, including the entire PCB with all conductive traces, any overlays and metal planes.


Stackup creation wizard

Use the stackup creation wizard to quickly create a project from your Gerbers

Edit stackup

Edit the individual layers, add dielectric layers, simulate a glass pane over the board etc. using the edit stackup pane

Simulation options

Select the electrode to simulate. Either from a list of all detected electrodes, or directly by selecting the electrode from the 3D view

Simulation results

View the simulation results directly in CapExt, or export them as a .csv file. View just the self-capacitance, or dig into the results to view each individual mutual capacitance

Arbitrarily dense boards

No need to limit the simulation to an artificially small subset of electrodes, as there is virtually no limit to how many layers or electrodes that can be present in a single simulation

Fast results

Results to within 25% accuracy, are usually available within less than a minute on a typical work-station

Use Cases

Decouple noisy lines from sensitive lines

With a CapExt, the exact capacitive coupling between two lines is easily extracted. Measure and reduce unwanted capacitive coupling before you send your Gerbers to production.

Account for parasitic capacitances at design-time

Account for trace capacitances when choosing balancing capacitors for crystal oscillators, when fine-tuning analog filters or when designing digital communication lines for fast transmission-rates.

Optimize capacitive touch sensors

Both ITO-based sensors and copper electrodes can be simulated, for both self- and mutual capacitance.

Optimize sensors to ensure that the parasitic capacitance is low enough to ensure fast measurements, while keeping the sensor sensitive to touches. Since there is no limitation on the number of electrodes present in the simulation, you can simulate a whole large touchscreen with hundreds of sensitive electrodes, capturing not only the capacitive coupling between each electrode, but also the capacitive effects due to the stackup above and below the sensor.

Make more compact PCBs

For wearables or other small PCBs, the capacitance between lines on nearby layers are usually quite high due to the thinner PCB substrates used. By using an accurate capacitance simulator, it is easier to achieve optimal routing, with less of a risk than when using rules of thumbs to estimate capacitances.

System Requirements

Operating System Windows 7 or newer (for Linux and OS X builds, please email info@capext.com)
CPU 32-bit or 64-bit Intel® or AMD® processor (64 bit recommended)
RAM 1 GB of RAM (4GB recommended)
Disk Space 100 MB free disk space for install